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102 Product Errata

41322 Rev. 3.84 August 2011

Revision Guide for AMD Family 10h Processors

379 DDR3-1333 Configurations with Two DIMMs per Channel May

Experience Unreliable Operation

Description

In systems with more than one DDR3-1333 unbuffered DIMM on a channel, the processor memory

subsystem may exhibit unreliable operation over the allowable VDDIO voltage range.

This erratum does not apply to DDR3-1333 configurations when only one DIMM per channel is

populated.

Potential Effect on System

Memory system failure leading to unpredictable system behavior.

Suggested Workaround

In a configuration where two unbuffered DDR3-1333 DIMMs are populated on one channel, BIOS

should derate DDR3-1333 system memory to 533 MHz operation (DDR3-1066) by setting the

DRAM Configuration High Register[MemClkFreq] (F2x[1, 0]94[2:0]) to 100b and adjusting

memory subsystem timing parameters accordingly.

Fix Planned

Yes

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