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Chapter 7 Signal and Power-Up Requirements 35

23802E—September 2000 AMD Duron™ Processor Data Sheet

Preliminary Information

Figure 11. Typical SIP Protocol Sequence

Table 16. SIP Protocol States and Actions

State Action

When NB_RESET# and RESET# are asserted, the system asserts CONNECT and CLKFWDRST and the

processor asserts PROCRDY.

When NB_RESET# is deasserted, the system deasserts CONNECT, but continues to assert CLKFWDRST.

When RESET# is deasserted, the processor deasserts PROCRDY and is ready for initialization (via the SIP

Protocol).

Note: The system must be out of reset before the processor deasserts PROCRDY

After one or more SYSCLK periods after the deassertion of PROCRDY, the system deasserts CLKFWDRST.

(States 3 & 4 are performed for AMD system bus legacy reasons)

4 After one or more SYSCLK periods after the deassertion of CLKFWDRST, the system again asserts CLKFWDRST

Either at the assertion of CLKFWDRST or one or more SYSCLK periods later, the processor expects the start bit

(CONNECT asserted) of the SIP. The system delivers the SIP containing the processor clock-forwarding

initialization state over CONNECT as seen in Figure 11 on page 35.

After the SIP is transferred, the system asserts and holds CONNECT. This indicates the end of the SIP transfer to

the processor.

One or more SYSCLK periods after receiving the SIP, the processor asserts PROCRDY to indicate to the system

that it has received the SIP, initialized itself, and is ready.

7 One or more SYSCLK periods after the assertion of PROCRDY, the system deasserts CLKFWDRST.

8 Two SYSCLK periods after CLKFWDRST is sampled deasserted, the processor drives its forward clocks.

Star

SIP

0ns 25ns 50ns 75ns 100ns 125ns

NB_Reset#

RESET#

CLKFWDRST

CONNECT

PROCRDY

SYSCLK

SADDOUTCLK#

ADDOUT[14:2]#

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AMD Duron Manual do Utilizador Página 47