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Chapter 9 Pin Descriptions 61

23802E—September 2000 AMD Duron™ Processor Data Sheet

Preliminary Information

Scan Pins SCANSHIFTEN (Q5), SCANCLK1 (S1), SCANINTEVAL (S3),

and SCANCLK2 (S5) are the scan interface. This interface is

AMD internal and is tied disabled with 1-kohm resistors to VSS

on the motherboard.

SCHECK[7:0]# Pin For systems that do not support ECC, SCHECK[7:0]# should be

treated as NC pins.

SMI# Pin SMI# is an input that causes the processor to enter the system

management mode.

STPCLK# Pin STPCLK# is an input that causes the processor to enter a lower

power mode and issue a Stop Grant special cycle.

SYSCLK and SYSCLK#

Pins

SYSCLK and SYSCLK# are differential input clock signals

provided to the processor’s PLL from a system-clock generator.

See “CLKIN, RSTCLK (SYSCLK) Pins” on page 57 for more

information.

SYSVREFMODE Pin SYSVREFMODE (AA5) is Low to ensure that the external

VREFSYS voltage is the actual voltage used by the input

buffers and that no scaling occurs internally between the

VREFSYS voltage and the input threshold. This pin is tied Low

with a 1.0-kohm resistor.

VCCA Pin VCCA is the processor PLL supply. VCCA current ranges from

0 mA to 32 mA at ~1 GHz. Vmax is 2.75 V and Vmin is 2.25 V.

Decouple this pin with a 0.1-uF capacitor. For information about

the VCCA pin, see Table 6, “VCCA AC and DC Characteristics,”

on page 21 and the “Motherboard Required Circuits” chapter

of the Motherboard PGA Design Guide, order# 90009.

VID[4:0] Pins The VID[4:0] signals are outputs to the motherboard that

indicate the required VCC_CORE voltage for the processor. The

VCC_CORE ID (VID) is sent to the motherboard VCC_CORE

regulator. The processor VID[4:0] outputs are open drain and

2.5-V tolerant. To prevent damage to the processor, if these

signals are pulled High to above 2.5 V, they must be electrically

be isolated from the processor. See “Voltage Identification

(VID[4:0])” on page 20 for the AC and DC characteristics for

VID[4:0].

The motherboard is required to pull VID[4:0] Low for the

voltage regulator to supply voltage in the appropriate range for

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