AMD K5 Manual do Utilizador Página 51

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18522F/0Jan1997 AMD-K5 Processor Data Sheet
PRELIMINARY INFORMATION
while the data cycle continues. Assertion of HOLD can occur at
any time, but HLDA will not be asserted until pending cycles
are completed.
To avoid excessive power drain, AHOLD should not be negated
when BRDY is asserted during a write cycle, and when ADS is
asserted at the beginning of a writeback cycle.
Use of BOFF BOFF causes the processor to float its local bus on the next
clock cycle and to terminate the current bus cycle (see Figure
7). BOFF is sampled every clock cycle. If both BOFF and BRDY
are asserted during the same clock cycle, BRDY is ignored and
the associated data transfer must be re-initiated. If BOFF is
asserted while ADS is asserted, the processor floats ADS, even
though it is in its asserted state. This situation must not be
interpreted as the start of a cycle by the system.
Figure 7. BOFF Timing
KEN must be reasserted by the system to enable caching on
any cycle that was previously aborted by BOFF. If a burst cycle
is aborted by the assertion of BOFF in the middle of the access,
the initial state of KEN when the access began will be used
when the cycle is restarted. KEN should be reasserted if cach-
ing is enabled for the cycle.
Any cycles aborted due to BOFF are recorded behind a pend-
ing writeback cycle that is scheduled in response to a snoop hit
to a modified line. For example, if a cache line fill is aborted
due to BOFF, and an external cycle hits a modified line, the
cache line fill is completed after the modified line is written
back.
CLK
ADS
BOFF
Data
Add/
Control
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